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EPM7160SLC84-6-ND Complex Programmable Logic Devices (CPLD) Data Sheets Digi-Key Corporation


Available from: Digi-Key Corporation
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EPM7160SLC84-6-ND
SPECIFICATIONS View Entire Datasheet
Macrocells 160
System Gates 32000
Logic Cells / Logic Blocks 10.00
Package Type PLCC
Pins 64
Notes Surface (SMD, SMT), ISP (In-System Programmable)|JTAG, Commercial, Bulk
Abstract The MAX 7000 family provides programmable speed/power optimization. Speed-critical portions of a design can run at high speed/full power, while the remaining portions run at reduced speed/low power. This speed/power optimization feature enables the designer to configure one or more macrocells to operate at 50% or lower power while adding only a nominal timing delay. MAX 7000E and MAX 7000S devices also provide an option that reduces the slew rate of the output buffers, minimizing noise transients when non-speed-critical signals are switching. The output drivers ...
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