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544-1343-ND Complex Programmable Logic Devices (CPLD) Data Sheets Digi-Key Corporation

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544-1343-ND

SPECIFICATIONS

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Macrocells	1700
Logic Cells / Logic Blocks	2210
Package Type	FBGA
Pins	272
User I/Os (pins)	272
Notes	Surface (SMD, SMT), ISP (In-System Programmable)\|JTAG, Commercial, Bulk
Abstract	The MAX II CPLD has the following features: Low-cost, low-power CPLD Instant-on, non-volatile architecture Standby current as low as 29 µA Provides fast propagation delay and clock-to-output times Provides four global clocks with two clocks available per logic array block (LAB) UFM block up to 8 Kbits for non-volatile storage MultiVolt core enabling external supply voltages to the device of either 3.3 V/2.5 V or 1.8 V MultiVolt I/O interface supporting 3.3-V, 2.5-V, 1.8-V, and 1.5-V logic level...

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