Flip-flops are digital logic devices that synchronize changes in output state (1 or 0) according to a clocked input. Because they use sequential logic, flip-flops control and are controlled by other circuitry in a specific sequence that is determined by both a control clock and enable/disenable control signals. Several types of flip-flops are available. D flip-flops have one data input (D) and two outputs (Q and Q’). S-R flip-flops have either set (S) and reset (R) inputs, or set (S) and clear (C) inputs. Depending on the input values, the two complementary outputs (Q and Q’) change according to the device’s logical function at the moment of the clock input’s active transition. Active high and active low S-R flip-flops are available. J-K flip-flops, a type of S-R device, define the flip-flop’s indeterminate state. Toggle or T flip-flops, a single input version of the J-K flip-flop, toggle the output with each clock pulse. Typically, T flip-flops are used to develop counters, registers, and similar devices.
Flip-flops vary in terms of supply voltage, operating current, propagation delay, power dissipation, low level output current (sink), high level output current (source), maximum clocking frequency, trigger type, and output characteristics. Supply voltages range from - 5 V to 5 V and include intermediate voltages such as -4.5 V, -3.3 V, -3 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3 V, 3.3 V, and 3.6 V. The operating current is the minimum current needed for active operation. The propagation delay is the time interval between the application of an input signal and the occurrence of the corresponding output. Power dissipation, the total power consumption of the device, is generally expressed in watts or milliwatts. The low-level output current (IOL) is the output current to which gates sink. The high-level output current (IOH) is the output current that gates source to a load. The maximum clocking frequency (fMAX) is the highest rate in hertz (Hz) at which flip-flops can be triggered reliably. Positive-edge, negative-edge, and master/slave triggers are available. In terms of output characteristics, flip-flops are available with three-state, open-collector, and complementary outputs. Output enable (OE) inputs have an enable pin for the output.
Flip-flops are digital logic devices that synchronize changes in output state (1 or 0) according to a clocked input. Because they use sequential logic, flip-flops control and are controlled by other circuitry in a specific sequence that is determined by both a control clock and enable/disenable control signals. Several types of flip-flops are available. D flip-flops have one data input (D) and two outputs (Q and Q’). S-R flip-flops have either set (S) and reset (R) inputs, or set (S) and clear (C) inputs. Depending on the input values, the two complementary outputs (Q and Q’) change according to the device’s logical function at the moment of the clock input’s active transition. Active high and active low S-R flip-flops are available. J-K flip-flops, a type of S-R device, define the flip-flop’s indeterminate state. Toggle or T flip-flops, a single input version of the J-K flip-flop, toggle the output with each clock pulse. Typically, T flip-flops are used to develop counters, registers, and similar devices.
Flip-flops vary in terms of supply voltage, operating current, propagation delay, power dissipation, low level output current (sink), high level output current (source), maximum clocking frequency, trigger type, and output characteristics. Supply voltages range from - 5 V to 5 V and include intermediate voltages such as -4.5 V, -3.3 V, -3 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3 V, 3.3 V, and 3.6 V. The operating current is the minimum current needed for active operation. The propagation delay is the time interval between the application of an input signal and the occurrence of the corresponding output. Power dissipation, the total power consumption of the device, is generally expressed in watts or milliwatts. The low-level output current (IOL) is the output current to which gates sink. The high-level output current (IOH) is the output current that gates source to a load. The maximum clocking frequency (fMAX) is the highest rate in hertz (Hz) at which flip-flops can be triggered reliably. Positive-edge, negative-edge, and master/slave triggers are available. In terms of output characteristics, flip-flops are available with three-state, open-collector, and complementary outputs. Output enable (OE) inputs have an enable pin for the output.
Selecting flip-flops requires an analysis of logic families. Transistor-transistor logic (TTL) and related technologies such as Fairchild advanced Schottky TTL (FAST) use transistors as digital switches. By contrast, emitter coupled logic (ECL) uses transistors to steer current through gates that compute logical functions. Another logic family, complementary metal-oxide semiconductor (CMOS), uses a combination of p-type and n-type metal-oxide-semiconductor field effect transistors (MOSFETs) to implement logic gates and other digital circuits. Logic families for flip-flops include cross-bar switch technology (CBT), Gallium arsenide (GaAs), integrated injection logic (I2L) and silicon on sapphire (SOS). Gunning with transceiver logic (GTL) and gunning with transceiver logic plus (GTLP) are also available.
Flip-flops are available in a variety of IC package types and with different numbers of pins and flip-flops. Basic IC package types for flip-flops include ball grid array (BGA), quad flat package (QFP), single in-line package (SIP), and dual in-line package (DIP). Many packaging variants are available. For example, BGA variants include plastic-ball grid array (PBGA) and tape-ball grid array (TBGA). QFP variants include low-profile quad flat package (LQFP) and thin quad flat package (TQFP). DIPs are available in either ceramic (CDIP) or plastic (PDIP). Other IC package types include small outline package (SOP), thin small outline package (TSOP), and shrink small outline package (SSOP).
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